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Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations | Semantic Scholar
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Figure 1 from Modeling MOS snapback for circuit-level ESD simulation using BSIM3 and VBIC models | Semantic Scholar
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Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations | Semantic Scholar
PDF) Modeling MOS snapback for circuit-level ESD simulation using BSIM3 and VBIC models
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Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions
